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512 Kbit SPI Serial Flash
A Microchip Technology Company
SST25VF512
Data Sheet
Block Protection Lock-Down (BPL)
WP# pin driven low (V IL ), enables the Block-Protection-Lock-Down (BPL) bit. When BPL is set to 1, it
prevents any further alteration of the BPL, BP1, and BP0 bits. When the WP# pin is driven high (V IH ),
the BPL bit has no effect and its value is “Don’t Care”. After power-up, the BPL bit is reset to 0.
Table 3: Software Status Register Block Protection 1
Status
Register Bit
Protected
Protection Level
0
1
BP1
0
0
BP0
0
1
Memory Area
None
0C000H-0FFFFH
(1/4 Memory Array) 2
2
1
0
08000H-0FFFFH
(1/2 Memory Array)
3
1
1
00000H-0FFFFH
(Full Memory Array)
T3.5 25076
1. Default at power-up for BP1 and BP0 is ‘11’.
2. Protection Level 1 (1/4 Memory Array) applies to Byte-Program, Sector-Erase, and Chip-Erase operations.
It does not apply to Block-Erase operations.
Table 4: Software Status Register
Bit Name Function
Default at Power-up
Read/Write
0
BUSY 1 = Internal Write operation is in progress
0
R
0 = No internal Write operation is in progress
1
WEL
1 = Device is memory Write enabled
0
R
0 = Device is not memory Write enabled
2
3
4:5
6
BP0
BP1
RES
AAI
Indicate current level of block write protection (See Table 3)
Indicate current level of block write protection (See Table 3)
Reserved for future use
Auto Address Increment Programming status
1
1
0
0
R/W
R/W
N/A
R
1 = AAI programming mode
0 = Byte-Program mode
7
BPL
1 = BP1, BP0 are read-only bits
0
R/W
0 = BP1, BP0 are read/writable
T4.0 25076
Auto Address Increment (AAI)
The Auto Address Increment Programming-Status bit provides status on whether the device is in AAI
programming mode or Byte-Program mode. The default at power up is Byte-Program mode.
?2011 Silicon Storage Technology, Inc.
8
DS25076A
10/11
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